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📢 Call for Papers — Volume 13, Issue 7 (July 2026) | Submission Deadline: July 31, 2026 | Rapid peer review: 2–3 days | Impact Factor: 7.37 (SJIF 2026)

Paper Details

📄 IJAERD-OJS-4689

Dual-DC-Port Asymmetrical 5-Level H-Bridge Inverter With PI,PWM&SPWM Technique

Author(s):Kiran Kumar.S.G, Dr.H.S.Sridhar (Assistant Professor), Eshwaraiah (Manager-Aircraft Division, HAL), Abdul Rehman (Senior Manager – Aircraft Division, HAL)
Institution:Department of Electrical and Electronics, Siddaganaga Institute of Technology, Tumkur, India
Published In:Vol. 7, Issue 7 — July 2020
Page No.:86-94
Domain:Engineering
Type:Research Paper
ISSN (Online):2348-4470
ISSN (Print):2348-6406
Abstract

Improving the harmonics performance of H-Bride multilevel inverter through different modulation techniqueshas been researched in recent times. Several solutions were proposed for it. For most heavy and medium voltageapplications, five level invertersare most used due to many advantages and it is easy to develop when compared to higherlevel (7 or 9) inverters. There are several modulation techniques and most popular among them is Sinusoidal Pulse WidthModulation.(SPWM).Dual-DC-port asymmetrical 5 level multi-level inverter (DP-AMI) using a new pulse widthmodulation (PWM) scheme and SPWM technique has been proposed. In this paper, a MATLAB/SIMULINK analysisusing PI,PWM and SPWM for a 5 level HB MLI with reduced power switches is presented.

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🕮 How to Cite

Kiran Kumar.S.G, Dr.H.S.Sridhar (Assistant Professor), Eshwaraiah (Manager-Aircraft Division, HAL), Abdul Rehman (Senior Manager – Aircraft Division, HAL), “Dual-DC-Port Asymmetrical 5-Level H-Bridge Inverter With PI,PWM&SPWM Technique”, International Journal of Advance Engineering and Research Development (IJAERD), Vol. 7, Issue 7, pp. 86-94, July 2020.

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Vol. 13 | Issue 7
July 2026