Effect of Convergence on Hardware Design Flow of Digital Signal Processing
| Author(s) | : | Laxman Perika |
| Institution | : | Asst. Professor, Dept. of ECE , Jagruti Institute of Engineering & Technology |
| Published In | : | Vol. 4, Issue 11 — November 2017 |
| Page No. | : | 823-830 |
| Domain | : | Engineering |
| Type | : | Research Paper |
| ISSN (Online) | : | 2348-4470 |
| ISSN (Print) | : | 2348-6406 |
Design of real-time development, memory and processor in digital signal processing systems for decades havebeen fulfill on GPP. Various efforts to improve the performance of these systems resulted in the use of specific digital signalprocessing devices like DSP processors of electronics design - Application Specific Integrated Circuits. The advance ofRAM-based Field Programmable Gate Arrays has changed the DSP design flow. Software algorithmic designers can nowtake their DSP algorithms right from inception to hardware implementation, thanks to the increasing number of C/C++hardware design flow. This has led to a demand in the industry for graduates with good skills in both electrical engineeringand electronics engineering. This paper evaluates the impact of technology on DSP-based designs, hardware designlanguages, and how graduate/undergraduate courses have changed to suit this transition.
Laxman Perika, “Effect of Convergence on Hardware Design Flow of Digital Signal Processing”, International Journal of Advance Engineering and Research Development (IJAERD), Vol. 4, Issue 11, pp. 823-830, November 2017.
