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DOI will be assigned to every published paper at no additional charge. 📢 Call for Papers — Volume 13, Issue 10 (October 2026) | Submission Deadline: October 26, 2026 | Rapid peer review: 2–3 days | Impact Factor: 7.37 (SJIF 2026)

Paper Details

📄 IJAERD-OJS-1709

Design and Implementation of 8 bit Microprocessor using VHDL

Author(s):Mr. AMIT ANIL MALI, Mr. JILANI A.H SAWANT, Mr. ROHIT DINKAR YOGI, Prof. ANIL GOPAL SAWANT
Institution:Department of Electronics & Telecommunication ,Trinity College of Engineering & Research, Pune , India.
Published In:Vol. 3, Issue 5 — May 2016
Page No.:881-886
Domain:Engineering
Type:Research Paper
ISSN (Online):2348-4470
ISSN (Print):2348-6406
Abstract

In this paper, we are designing and implementing the 8 bit Microprocessor using VHDL synthesis tool Xilinx14.2 on FPGA board. Microprocessor is basically an electronic device which consists of ALU and Control circuitrywhich is required to work as computer’s CPU. The Control unit is the main part of this design, which controls allmodules which performs different operations like Arithmetic and Logical operations. Each and every module is designedseparately and after that control unit combines these entire module using control signals. Our system was implementedon the Xilinx Spartan 3 XC3S400PQ208 using ISE foundation 14.2 and VHDL. Total 329 slices, 415 slice flip-flops, 320four inputs LUTs, 38 numbers of Bounded IOBs are used.

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🕮 How to Cite

Mr. AMIT ANIL MALI, Mr. JILANI A.H SAWANT, Mr. ROHIT DINKAR YOGI, Prof. ANIL GOPAL SAWANT, “Design and Implementation of 8 bit Microprocessor using VHDL”, International Journal of Advance Engineering and Research Development (IJAERD), Vol. 3, Issue 5, pp. 881-886, May 2016.

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Vol. 13 | Issue 10
October-2026