Simulation and Analysis of First and Second Generations of Current Conveyor using 90nm CMOS Technology
| Author(s) | : | Megha M. Patel, Nilesh D. Patel |
| Institution | : | 1 PG Student Electronic & Communication, LCIT-Bhandu Gujarat Technological University, Gujarat, India |
| Published In | : | Vol. 2, Issue 4 — April 2015 |
| Page No. | : | 504-511 |
| Domain | : | Engineering |
| Type | : | Research Paper |
| ISSN (Online) | : | 2348-4470 |
| ISSN (Print) | : | 2348-6406 |
—Current conveyors are unity gain analog building block having high linearity, provide higher gainbandwidth product and wide dynamic range. The current conveyor is a combination of voltage as well as currentfollower. The current conveyors operate at low voltage supplies and consume less power. Current Conveyor structure isvery simple. The First and Second Generation current conveyors are simulated using 90nm CMOS techn ology. The mainfeatures of these current conveyors are low voltage, less power dissipation, high linearity and wide bandwidth forvoltage transfer (Vy to Vx) and current transfer (Ix to Iz) which make them suitable for high frequency and low powerapplications.
Megha M. Patel, Nilesh D. Patel, “Simulation and Analysis of First and Second Generations of Current Conveyor using 90nm CMOS Technology”, International Journal of Advance Engineering and Research Development (IJAERD), Vol. 2, Issue 4, pp. 504-511, April 2015.
