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DOI will be assigned to every published paper at no additional charge. ðŸ“Ē Call for Papers — Volume 13, Issue 10 (October 2026) | Submission Deadline: October 26, 2026 | Rapid peer review: 2–3 days | Impact Factor: 7.37 (SJIF 2026)

Paper Details

📄 IJAERD-OJS-0122

High performance dual output CMOS Realization of the Third Generation Current Conveyor (CCIII)

Author(s):Prachi Parikh, Gireeja Amin
Institution:PG Student, Gujarat Technology University, Electronics and Communication, LCIT-Bhandu, Mehsana, Gujarat, India prachiparikh1989@gmail.com
Published In:Vol. 1, Issue 5 — May 2014
Page No.:648-654
Domain:Engineering
Type:Research Paper
ISSN (Online):2348-4470
ISSN (Print):2348-6406
Abstract

In this paper a new CMOS high performance dual-output realization of the third generationcurrent conveyor (CCIII) is presented. The presented CCIIl provides good linearity, high outputimpedance at port Z and excellent input/output current gain. SPICE simulation results using TSMC0.18Ξm and Generic 0.09Ξm CMOS process parameters in Mentor Graphics are given.

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🕮 How to Cite

Prachi Parikh, Gireeja Amin, “High performance dual output CMOS Realization of the Third Generation Current Conveyor (CCIII)”, International Journal of Advance Engineering and Research Development (IJAERD), Vol. 1, Issue 5, pp. 648-654, May 2014.

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Vol. 13 | Issue 10
October-2026