DESIGN AND IMPLEMENTATION OF SERIAL PERIPHERAL INTERFACE
Keywords:
Motorola, Serial Peripheral Interface(SPI), FPGA, Interfacing, Xilinx ISE 12.4Abstract
SPI stands for Serial Peripheral Interface, A typical processor based system not only has to acquire data
and process it, but also requires secondary devices like sensors, real time clocks, or communication channels to receive
and pass process control information to and from other processors. SPI bus protocol is mainly used for IC to IC
communication within the system. SPI provides synchronous serial communication between two IC’s. SPI is developed
by Motorola for Interfacing micro controllers, microprocessors and various devices such sensors, memory chips,
printers, and data converters. SPI architecture consists of one Master and one or more slaves. The aim of the project is
to develop SPI master-slave interface in verilog and verify the same using self checking test bench. Verilog standardized
as IEEE 1164, is a Hardware Description Language (HDL). This paper presents a full explanation of a Serial
Peripheral Interface bus protocol. The SPI Master and Slave can be designed and implemented on Spartan FPGA kit
and results can be simulated using Xilinx ISE 12.4 simulator.
